This “half a day” workshop will address some of these topics as it aims to depict the available pieces of software that will help in integrating an actual quantum computer inside a machine room, making it available to end users.
This workshop is a follow-up to the BoF “Towards Hardware Agnostic Standards in Hybrid HPC/Quantum Computing” at ISC’24.
Quantum Computing is not a completely new topic: it was introduced in 1981 during a conference at MIT, but it really came under the spotlight as Peter Shor released his famous algorithm capable of breaking RSA encryption with tremendous acceleration. The domain remained a bit theoretical, studied in mathematical computer science, until a few years ago when actual Quantum Computers arrived on the market providing real (but yet limited) quantum compute resources. In the very last years, Quantum Computers gained more compute power, and they started to be deployed inside HPC centers while also becoming available on cloud based platforms.
As Quantum Computers leave the laboratories where they were designed and enter the HPC machine room, it becomes necessary to consider how they can be used to perform actual computation on real life use cases. As we are still in the NISQ era, and because HPC resources may help in using Quantum Computers efficiently, the hybrid HPC/QC naturally appeared, providing acceleration similarly to GPU previously.
This is not as easy as it seems. As the hardware becomes ready to be installed in computer rooms, the software stack has not evolved as fast. In particular, the required software stack to “glue” HPC and QC is not fully defined. Solutions exist and are provided by both research institutes and vendors, but they obey no standard.
Current Quantum Computers are provided with a very simple software stack, usually a Python based framework, providing native access to the computing resources as well as a “mock device” providing emulation on standard CPU (and sometimes GPU) compute power. As we consider the integration inside the computer center, many topics, related to system integration as well as application integration are to be considered, such as:
This “half a day” workshop will address some of these topics as it aims to depict the available pieces of software that will help in integrating an actual quantum computer inside a machine room, making it available to end users.
This is the first edition of the QRUCH workshop. It's a follow-up of a BoF session at ISC'24.
The workshop is composed of 3 sessions: a keynote address, 6 lightning talks and a export panel.
The lightning talks will belong to two rounds, separated by the coffee break. Each talk will last 10 minutes plus 5 minutes for Q/A.
QRUCH workshop spans a half day, its agenda is organised as follows:
| Time | Topic |
|---|---|
| 14h00 - 14h05 | Participants Welcoming |
| 14h05 - 15h00 | Keynote Speaker |
| 15h00 - 16h00 | Lightning Talks (1st round) |
| 16h00 - 16h30 | Coffee Break (synchronised with ISC'25) |
| 16h30 - 17h00 | Lightning Talks (2nd round) |
| 17h00 - 17h55 | Expert Panel |
| 17h55 - 18h00 | Wrap-up and Conclusions |
| 18h00 | End of Workshop |
ADD HERE THE DESCRIPTION OF THE KEYNOTE TALK
This lightning talk will showcase an interface, called the Quantum Device Management Interface (QDMI), that addresses this problem by explicitly connecting the software and hardware developers, mediating between their competing interests. QDMI allows hardware platforms to provide their physical characteristics in a standardized way, and software tools to query that data to guide the compilation process accordingly. QDMI is publicly available as open source at https://github.com/Munich-Quantum-Software-Stack/QDMI.
Today, HPC centers and quantum computers, as the number of quantum machines is dramatically lower than that of classical nodes. As jobs execute quantum kernels (or wait for their turn in a time-partitioned quantum resource), HPC nodes may be idle, thus occupying resources without performing anything. This phenomenon introduces inefficiencies in the overall HPC center performance. We suggest tackling the issue by adopting a more dynamic method to handle resource assignments, i.e., through malleability properties. With the SmartHPC.QC project (a collaboration between E4 Computer Engineering, Links Foundation, Università di Torino and CINECA), we aim to develop a malleable solution for allocating quantum resources in an HPC-QC pipeline.
Quantum computers are available via a variety of different quantum cloud offerings and quantum circuits can be implemented using different quantum programming languages. As a consequence, using a specific quantum programming language for implementing the application at hand can limit the set of compatible quantum cloud offerings and cause a vendor lock-in. Therefore, we introduce the architecture for a unification middleware that facilitates accessing quantum computers available via different quantum cloud offerings by automatically translating between various quantum circuits and result formats
Programming quantum computers today still requires substantial knowledge of the physical basis of these devices. This creates a tall barrier for non-physicists to benefit from the additional computational resources QPUs provide and constrains the growth in number of successful final applications. When put in the perspective of integrating HPC and QPU resources, hybrid classical-quantum programming today seems not be poised to scale up alongside qubit counts, fault tolerance and utility-scale devices within the following decade. We will discuss new directions for quantum-only programming models inspired by four decades of parallel computing (including MPI, OpenMP and CUDA) where the main objective is to provide a uniform programming surface with much lower difficulty for newcomers
Coffee Break (synchronised with ISC'25 coffee break)
The talk will take a critical look at the current state of quantum software stack and what we can learn from 70 years of classical computing when designing the integration of quantum computing into classical infrastructures
Quantum computing offers a promising approach to solving complex computational problems. However, integrating quantum computing into existing high-performance computing (HPC) environments remains a significant challenge. The Q-Pragma programming framework aims to facilitate this integration by embedding quantum directives within C++ code, enabling the development of hybrid quantum-classical applications. This presentation will explore the architecture of Q-Pragma, its role in optimizing quantum-classical interactions, and its potential for enhancing computational performance.
Camille Coti obtained a master degree in Télécom SudParis and received her PhD at University Paris-Saclay (UPSaclay France). She is now working as a professor for computer sciences at the ETSMTL (Ecole de Technologie Supérieure de Montréal) in Montreal, Canada
Santiago Núñez-Corrales, Ph.D. serves as Quantum Lead Research Scientist at the National Center for Supercomputing Applications (NCSA), University of Illinois Urbana-Champaign (UIUC). He also serves as faculty affiliate at the Illinois Quantum Information Science and Technology Center (IQUIST), the Center for Global Studies (CGS), the Arms Control & Domestic and International Security (ACDIS), and Illinois Informatics at the same institution.
Daniele Ottaviani obtained is master’s degree cum laude in applied mathematics at University of Rome “Sapienza”. He completed his studies with a II level Master degree in "Scientific Computing", where he deepened High Performance Computing (HPC), and with a Ph.D. in "Mathematics and Models". Since 2013 he has worked as Research fellow at the Astronomical Observatory of Rome "Monte Porzio Catone". Since 2018 he has been working in CINECA as HPC Software Developer, with a special active monitoring role for the nascent quantum technologies. Since 2024 he is the Head of the CINECA Quantum Computing Lab
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Ariana Torres-Knoop has a background in Physics, with a focus on computational, atomic scale and statistical physics. She did her PhD (cum-laude) in computational chemistry group at the University of Amsterdam. In 2019 she joined SURF, the IT collaboration for research and education in the Netherlands, as an HPC and Quantum Computing advisor. She currently is leading the Quantum Computing efforts at SURF.
Patrick Carribault is a Project Manager in HPC and Quantum Computing. Furthermore, he is a CEA Fellow and holds an HDR in Computer Science. His research focuses on software stack and co-design between parallel applications and high-performance compute architectures. Participating to various academia and industry collaborations, he studies parallel programming models, compilation and optimization of parallel performance targeting current and next-generation of supercomputers.
Patrick Carribault is a Project Manager in HPC and Quantum Computing. Furthermore, he is a CEA Fellow and holds an HDR in Computer Science. His research focuses on software stack and co-design between parallel applications and high-performance compute architectures. Participating to various academia and industry collaborations, he studies parallel programming models, compilation and optimization of parallel performance targeting current and next-generation of supercomputers
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Patrick Carribault is a Project Manager in HPC and Quantum Computing. Furthermore, he is a CEA Fellow and holds an HDR in Computer Science. His research focuses on software stack and co-design between parallel applications and high-performance compute architectures. Participating to various academia and industry collaborations, he studies parallel programming models, compilation and optimization of parallel performance targeting current and next-generation of supercomputers
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Ariana Torres-Knoop has a background in Physics, with a focus on computational, atomic scale and statistical physics. She did her PhD (cum-laude) in computational chemistry group at the University of Amsterdam. In 2019 she joined SURF, the IT collaboration for research and education in the Netherlands, as an HPC and Quantum Computing advisor. She currently is leading the Quantum Computing efforts at SURF.
Patrick Carribault is a Project Manager in HPC and Quantum Computing. Furthermore, he is a CEA Fellow and holds an HDR in Computer Science. His research focuses on software stack and co-design between parallel applications and high-performance compute architectures. Participating to various academia and industry collaborations, he studies parallel programming models, compilation and optimization of parallel performance targeting current and next-generation of supercomputers.
Philippe Deniel, is a Research Engineer since 1998, and Fellow Expert since 2021 at CEA/DIF, with a focus on mass storage technologies and Quantum Computing. Philippe is the scientific coordinator of the IO-SEA project funded by EuroHPC, and the original developer of NFS-Ganesha, an open-source NFS server in user space available under the terms of the LGPLv3.
the Workshop will take place at CCH Hamburg during the ISC High Performance 2025 Conference near the Dammtor train station in Hamburg, Germany